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Power Electronic Riddle No.11 - Gate drive circuits for MOSFET
What is the suitable gate drive circuits for MOSFET  single phase Building and how to testing of gate drive circuits on bread board and then on PCB?
Author : Abdi - From: Dubai
Wed, June 1st, 2011 - 10:50
The input gate characteristics of a MOSFET differ from its bipolar counterparts. The gate is isolated electrically from the source by a layer of silicon dioxide. Ideally, no current flows into the gate when a dc voltage is applied. However, a small leakage current (of the order of 10-10 A) flows to maintain the gate voltage and also during the transition periods (off-to-on and on-to-off). Therefore, a small current is enough to charge and discharge the device capacitances. However, the device capacitances and gate-drive source impedance determine the device switching speed. There are three capacitances and they are nonlinear and voltage-dependent (Fig. below).

If the gate voltage is reduced to zero for turn-off operation, VDS attains the supply voltage magnitude (VDD), the potential at D swings from 0 to VDD and Cgd is charged up to to VDD (say, 100 V) through a low gate source impedance (Rg ) as shown in Figure below.

Now if a gate drive signal is applied (higher than the threshold value), the device will be on. Ideally, the voltage across D and S reduces to zero (neglecting small VDS) and terminal D will swing to ground potential (which earlier was at VDD . 100 V). The decreasing VDS produces a feedback current (i =Cgd . dVDS/dt) through Cgd to the gate circuit as shown in Figure below.

This feedback mechanism is called the ‘‘Miller effect.’’ Thus, the source and sink capabilities of the gate drive are required: (i) due to the charging and discharging of Cgs ; and (ii) due to the large swing in the gate-to-drain voltage. Although Cgs is an important parameter, Cgd is more significant due to the Miller effect.
As the source resistance (Rg ) is in series with Cgs and Cgd , the turn-on time and the turn-off time are affected by this resistance. Therefore, both periods can be controlled independently (Figure below).

Similarly, a bipolar gate drive signal allows rapid turn-on and turn-off.
Low-power digital logic circuits (TTL or CMOS) can easily be used to drive directly the gate of power MOSFET. Because CMOS has limited source current and sink current capabilities (2 and 4mA   VDD = 12 V respectively), the modest delay in rise time and fall time are expected due to the Miller effect (charging and discharging current requirements).
However, the CMOS IC can directly drive the gate with required magnitude of the drive voltage. For a TTL device with a totem pole output, the output voltage available is approximately 3.5 V (when Vcc = 5 V). This voltage (3.5 V) may be insufficient to drive the MOSFET into the conduction mode. However, TTL has better source and sink capabilities than its counterpart CMOS, which speeds up the switching transition and reduces turn-on and turn-off times. Thus the output voltage magnitude can be raised by the open-collector
TTL device with a pull-up resistor connected to a separate +10 to +15 V dc power supply. It can guarantee rapid gate turn-off due to large sink capability when the output transistor of TTL (inside the TTL IC) is conducting at the logic ‘‘0’’ level. Moreover, this arrangement ensures sufficient gate voltage (10 to 15 V) to turn on the MOSFET fully.
However, the turn-on is not as rapid as turn-off because the pull-up resistor delays charging of the device capacitor Cgs.
Figure below shows a CMOS-based driver circuit.

The output voltage (+10 to +15 V) of CMOS logic is large enough to drive the MOSFET. To increase source and sink capabilities CMOS buffers (CD4049 and CD1450) are used. Thus performance is achieved with respect to switching speeds and low output impedance. To increase the switching speed further, more buffers can be connected in parallel to increase the sink current capabilities for fast turn-off.
Figure below shows the connection of an open-collector TTL-based driver circuit.

The drawback of the TTL output due to its lower magnitude of output (which is the input drive control signal) has been removed. Although an additional dc power supply (+10 to +15 V) will be required, this provides rapid turn-off and ensures sufficient gate voltage to turn on the MOSFET fully.
Figure (a) below shows a configuration for fast turn-on with reduced power dissipation in TTL.
When the TTL output is at the logic ‘‘1’’ level, transistor Q2 conducts. The output point (cathode of diode and base of Q2 ) comes to about the ground potential, and Q3 remains in the off state. A very small power loss (few milliwatts) occurs in R whose value is large, and it behaves as base resistance of Q3. Similarly, when the TTL output is at the logic ‘‘1’’ level, Q3 conducts due to the high voltage at its base and the diode becomes reverse biased. Thus a high voltage (approximately 12 V) reaches the gate of the MOSFET. The conducting Q3 provides a lower source impedance than R (as in the previous case, Fig. b). Thus the source capability increases, which enables a fast turn-on. The turn-off period depends on the conduction of the TTL output or pull-down transistor Q2 (by shunting the input gate capacitance of MOSFET to ground). Although the sink and source capability of different types of TTL families varies, the 74AC00 series (logic type) offers better performance for driving the MOSFET. The typical source current and sink current are 24mA with a 7-ns propagation delay. Only the Schottky (74S00 series) and the low-Schottky (74LS00 series) offer less propagation delay (4 ns) but their source and sink current magnitudes are significantly low.
Figure (d) shows an open-collector TTL driving a complementary emitter follower (push-pull configuration).
This circuit removes the drawback of the lower sink capability of the previous circuit (Fig. c). Thus, very fast turn-off (hence high switching speed) is attained by using an outboard transistor (Q4) to clamp the gate-to-ground. Both Q3 and Q4 are operating as emitter followers. As they are never driven into saturation, their associated storage times do not significantly affect the switching frequency limit of the gate drive circuit.
Figure (e) shows a bipolar driver circuit, where during on and off periods, the input drive signal varies between +Vcc to -Vcc . This type of driver circuit is required for fast switching applications. In this case the turn-on time and turn-off time are small and the configuration is similar to a complementary emitter-follower circuit. Here, source and sink capabilities are increased by providing low output impedance of the operational amplifier. Due to the negative voltage rail (-Vcc ), the input gate capacitor of MOSFET discharges quickly and hence the turn-off time decreases.
Figure (f) shows a pulse transformer-based driver circuit. The pulse transformer provides the isolation needed to drive the MOSFETs at different voltage levels (e.g., in a bridge configuration) or to control an N-channel MOSFET driving a grounded or source-follower load. The size of the transformer reduces significantly when the operating frequency becomes very high (100 kHz or more). As current and hence the power requirement for the gate driver circuit is very small at steady-state condition (few microwatts only), a separate driver circuit and additional independent dc power supply are not required. However, at the dynamic condition, that is, during turn-on or turn-off transitions, large current (high source and sink capability) is required for fast switching.
Another limiting factor is the switching capability of the diode. Thus the Schottky diode can be used because its turn-off time is very small (about 0.23 ms). Here, the high frequency carrier signal reaches the logic gates when the input drive control signal is high. The output voltage of logic gates become alternately high and low, and therefore current flows in the primary winding of the transformer from x to y and vice versa. Thus ac voltage, generated in the secondary winding of the transformer, is rectified and filtered. This dc voltage is ultimately used for driving the gate of a MOSFET. Recently, instead of a pulse transformer, a miniturized coreless (planar) transformer of about 1 cm2, fabricated on a printed-circuit board, was used at 1MHz for the same application
Figure (g) shows an optocoupler-based electrical isolation circuit.

Moreover, custom-built integrated driver circuits are also available for such applications. Figure below shows connections of the DS0026 or MMH0026 clock driver, which has been designed for high capacitive loads (high sink and source capability). It has a capability of +/-1.5 A output peak current (source and sink) with a typical 15-ns propagation delay, and is compatible with series 54/74 TTL devices.
Similarly, a large range of such custom-built integrated driver circuits are also available for such applications.

Author : Hamid - From: Iran
Tue, November 22nd, 2011 - 05:40
Hello Hamid,

I need assistance. I am trying to design a gate circuit for a mosfet. I was told to use a pulse transformer. If you could possibly help please contact me and I will give you information on the project that I am working on. 
Author : Steven haskins - From: America
Wed, November 23rd, 2011 - 12:04
This site has been made for technical discussion about various branches of power systems, so please say your problem for information sharing and more discussion. 
Author : Hamid - From: Iran- Firoozabad Fars
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